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7 DETAILS OF INSTRUCTIONS
ld.a %rd, [%sp]
Function
32-bit data transfer
Standard)
Extension 1) rd(23:0) ← A[sp + imm13](23:0), ignored ← A[sp + imm13](31:24)
Extension 2) rd(23:0) ← A[sp + imm24](23:0), ignored ← A[sp + imm24](31:24)
15 14 13 12 11 10
Code
0
0
1
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IL
IE
C
Flag
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–
–
–
Mode
Src: Register indirect %sp
Dst: Register direct %rd = %r0 to %r7
CLK
One cycle (two cycles when the ext instruction or an increment/decrement option is used)
Description
(1) Standard
ld.a
The 32-bit data (the eight high-order bits are ignored) in the specified memory location is
transferred to the rd register. The SP contains the memory address to be accessed.
(2) Extension 1
ext
ld.a
The e x t instruction changes the addressing mode to register indirect addressing with
displacement. As a result, the content of the SP with the 13-bit immediate imm13 added
comprises the memory address, the 32-bit data (the eight high-order bits are ignored) in which
is transferred to the rd register. The content of the SP is not altered.
(3) Extension 2
ext
ext
ld.a
The addressing mode changes to register indirect addressing with displacement, so the content
of the SP with the 24-bit immediate imm24 added comprises the memory address, the 32-bit
data (the eight high-order bits are ignored) in which is transferred to the rd register. The content
of the SP is not altered.
(4) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after
a branch instruction with the "d" bit. In this case, extension of the immediate by the ext
instruction cannot be performed.
Caution
The displacement must specify a 32-bit boundary address (two least significant bits = 0). Specifying
other address causes an address misaligned interrupt. Note, however, that the data transfer is
performed by setting the two least significant bits of the address to 0.
7-70
rd(23:0) ← A[sp](23:0), ignored ← A[sp](31:24)
9
8
7
6
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1
1
1
r d
0
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V
Z
N
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–
–
–
%rd,[%sp]
; memory address = sp
imm13
%rd,[%sp]
; memory address = sp + imm13
imm11
; imm11(10:0) = imm24(23:13)
imm13
; = imm24(12:0)
%rd,[%sp]
; memory address = sp + imm24
Seiko Epson Corporation
5
4
3
2
1
0
0
1
1
0
0
0
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S1C17 CORE MANUAL
(REV. 1.2)
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