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Shift and Swap Instructions
Mnemonic
Opcode
Operand
MSB
sr
%rd, %rs
0
0
1
0
1
%rd, imm7
1
0
1
1
0
sa
%rd, %rs
0
0
1
0
1
%rd, imm7
1
0
1
1
0
sl
%rd, %rs
0
0
1
0
1
%rd, imm7
1
0
1
1
1
swap
%rd, %rs
0
0
1
0
1
Remarks
*1) Number of bits to be shifted: Zero to three bits when rs/imm7 = 0–3, four bits when rs/imm7 = 4–7, eight bits when rs/imm7 ≥ 8
*2) With one EXT: immediate = imm20, With two EXT: immediate = imm24
Conversion Instructions
Mnemonic
Opcode
Operand
MSB
cv.ab
%rd, %rs
0
0
1
0
1
cv.as
%rd, %rs
0
0
1
0
1
cv.al
%rd, %rs
0
0
1
0
1
cv.la
%rd, %rs
0
0
1
0
1
cv.ls
%rd, %rs
0
0
1
0
1
System Control Instructions
Mnemonic
Opcode
Operand
MSB
nop
0
0
0
0
0
halt
0
0
0
0
0
slp
0
0
0
0
0
ei
0
0
0
0
0
di
0
0
0
0
0
Code
LSB
1
rd
1
1
0
0
rs
Logical shift to right; rd(15:0)←rd(15:0)>>rs(15:0), rd(23:16)←0, zero enters to MSB (*1)
0
rd
imm7
Logical shift to right; rd(15:0)←rd(15:0)>>imm7, rd(23:16)←0, zero enters to MSB (*1)
1
rd
1
1
0
1
rs
Arithmetical shift to right; rd(15:0)←rd(15:0)>>rs(15:0), rd(23:16)←0, sign copied to MSB (*1)
1
rd
imm7
Arithmetical shift to right; rd(15:0)←rd(15:0)>>imm7, rd(23:16)←0, sign copied to MSB (*1)
1
rd
1
1
1
0
rs
Logical shift to left; rd(15:0)←rd(15:0)<<rs(15:0), rd(23:16)←0, zero enters to LSB (*1)
0
rd
imm7
Logical shift to left; rd(15:0)←rd(15:0)<<imm7, rd(23:16)←0, zero enters to LSB (*1)
1
rd
1
1
1
1
rs
rd(15:8)←rs(7:0), rd(7:0)←rs(15:8), rd(23:16)←0
Code
LSB
0
rd
0
1
1
1
rs
rd(23:8)←rs(7), rd(7:0)←rs(7:0)
0
rd
1
0
1
1
rs
rd(23:16)←rs(15), rd(15:0)←rs(15:0)
0
rd
1
1
1
1
rs
rd(23:16)←rs(7:0), rd(15:0)←rd(15:0)
0
rd
0
1
1
0
rs
rd(23:8)←0, rd(7:0)←rs(23:16)
0
rd
1
0
1
0
rs
rd(23:16)←0, rd(15:0)←rs(15)
Code
LSB
0
0
0
0
0
0
0
0
0
0
0
No operation
0
0
0
0
0
0
0
1
0
0
0
HALT mode
0
0
0
0
0
0
1
0
0
0
0
SLEEP mode
0
0
0
0
0
1
0
0
0
0
0
psr(IE)←1
0
0
0
0
1
0
0
0
0
0
0
psr(IE)←0
Function
Function
Function
S1C17 Core Instruction Set
Flags
Cycle
EXT
D
IL
IE
C
V
Z
N
↔
↔
↔
1
–
–
–
–
1
–
–
↔
–
↔
↔
*2
1
–
–
↔
–
↔
↔
–
1
–
–
↔
–
↔
↔
*2
1
–
–
↔
–
↔
↔
–
1
–
–
↔
–
↔
↔
*2
1
–
–
–
–
–
–
–
S1C17 Core Instruction Set
Flags
Cycle
EXT
D
IL
IE
C
V
Z
N
1
–
–
–
–
–
–
–
1
–
–
–
–
–
–
–
1
–
–
–
–
–
–
–
1
–
–
–
–
–
–
–
1
–
–
–
–
–
–
–
S1C17 Core Instruction Set
Flags
Cycle
EXT
D
IL
IE
C
V
Z
N
1
–
–
–
–
–
–
–
6
–
–
–
–
–
–
–
–
6
–
–
–
–
–
–
–
–
1
–
1
–
–
–
–
–
1
–
0
–
–
–
–
–
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