Ld.a [Imm7], %Rs - Epson S1C17 Series Manual

ld.a [imm7], %rs

Function 32-bit data transfer
Standard)
Extension 1) A[imm20](23:0) ← rs(23:0), A[imm20](31:24) ← 0
Extension 2) A[imm24](23:0) ← rs(23:0), A[imm24](31:24) ← 0
15 14 13 12 11 10
Code
1 1 0
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IL IE C
Flag
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– – –
Mode Src: Register direct %rs = %r0 to %r7
Dst: Immediate data (unsigned)
CLK One cycle
Description (1) Standard
ld.a
The content of the rs register is transferred to the memory address specified with the 7-bit
immediate imm7. This instruction writes 32-bit data with the eight high-order bits set to 0 in the
memory.
(2) Extension 1
ext
ld.a
The ext instruction extends the displacement to a 20-bit quantity. As a result, the content of the
rs register is transferred to the memory address specified with the 20-bit immediate imm20.
(3) Extension 2
ext
ext
ld.a
The two ext instructions extend the displacement to a 24-bit quantity. As a result, the content
of the rs register is transferred to the memory address specified with the 24-bit immediate
imm24.
(4) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after
a branch instruction with the "d" bit. In this case, extension of the immediate by the ext
instruction cannot be performed.
Example
ext 0x1
ld.a [0x4],%r0
Caution
The imm7 must specify a 32-bit boundary address (two least significant bits = 0). Specifying other
address causes an address misaligned interrupt. Note, however, that the data transfer is performed
by setting the two least significant bits of the address to 0.
S1C17 CORE MANUAL
(Rev. 1.2)
A[imm7](23:0) ← rs(23:0), A[imm7](31:24) ← 0
9 8 7 6
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1 1 1 r s
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V Z N
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– – –
[imm7],%rs ; memory address = imm7
imm13 ; = imm20(19:7)
[imm7],%rs ; memory address = imm20, imm7 = imm20(6:0)
imm4 ; imm4(3:0) = imm24(23:20)
imm13 ; = imm24(19:7)
[imm7],%rs ; memory address = imm24, imm7 = imm24(6:0)
; [0x84] ← r0
Seiko Epson Corporation
5 4 3 2 1 0
imm7
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7 DETAILS OF INSTRUCTIONS
7-85