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7 DETAILS OF INSTRUCTIONS
ld.a %rd, %sp
Function
24-bit data transfer
Standard)
Extension 1) Unusable
Extension 2) Unusable
15 14 13 12 11 10
Code
0
0
1
|
|
IL
IE
C
Flag
|
|
–
–
–
Mode
Src: Register direct %sp
Dst: Register direct %rd = %r0 to %r7
CLK
One cycle
Description
The content of the SP (24-bit data) is transferred to the rd register.
Example
ld.a
%r0,%sp
7-66
rd(23:2) ← sp(23:2), rd(1:0) ← 0
9
8
7
6
|
|
1
1
1
r d
0
|
|
|
|
|
V
Z
N
|
|
|
–
–
–
; r0 ← sp
Seiko Epson Corporation
5
4
3
2
1
0
0
1
0
0
0
0
|
|
|
|
|
|
S1C17 CORE MANUAL
(REV. 1.2)
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