Arithmetic Operation Instructions - Epson S1C17 Series Manual

Cmos 16-bit single chip microcontroller
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5.6 Arithmetic Operation Instructions

The instruction set of the S1C17 Core supports add/subtract, and compare instructions for arithmetic operations.
16-bit addition
add
24-bit addition
add.a
16-bit addition with carry
adc
16-bit subtraction
sub
24-bit subtraction
sub.a
16-bit subtraction with borrow
sbc
16-bit comparison
cmp
24-bit comparison
cmp.a
16-bit comparison with borrow
cmc
The above arithmetic operations are performed between one general-purpose register and another (R0–R7), or be-
tween a general-purpose register and an immediate. Furthermore, the add.a and sub.a instructions can perform
operations between the SP and a general-purpose register/immediate. Immediates in sizes smaller than the opera-
tion unit (16 bits or 24 bits), except for the cmp instruction, are zero-extended when operation is performed.
The cmp instruction compares two operands, and may alter a flag, depending on the comparison result. Basically,
it is used to set conditions for conditional jump instructions. If an immediate smaller than operation unit in size is
specified as the source, it is sign-extended when comparison is performed.
Conditional execution
The arithmetic operation instructions for between registers (op %rd,%rs) allow use of the switches to specify
whether the instruction will be executed or not depending on the C flag status.
Unconditional execution instructions
op
%rd,%rs
The instruction without a switch will be always executed regardless how the C flag is set.
Example: add
%rd,%rs
Instructions executable under C condition
op/c
%rd,%rs
The instruction with the /c switch will be executed only when the C flag has been set to 1.
Example: sub/c
Instructions executable under NC condition
op/nc
%rd,%rs
The instruction with the /nc switch will be executed only when the C flag has been cleared to 0.
Example: cmp/nc
S1C17 CORE MANUAL
(Rev. 1.2)
(op = add, add.a, adc, sub, sub.a, sbc, cmp, cmp.a, cmc)
(op = add, add.a, adc, sub, sub.a, sbc, cmp, cmp.a, cmc)
%rd,%rs
(op = add, add.a, adc, sub, sub.a, sbc, cmp, cmp.a, cmc)
%rd,%rs
Seiko Epson Corporation
5 INSTRUCTION SET
5-15

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