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ld.ub %rd, %rs
Function
Unsigned byte data transfer
Standard)
Extension 1) Unusable
Extension 2) Unusable
15 14 13 12 11 10
Code
0
0
1
|
|
IL
IE
C
Flag
|
|
–
–
–
Mode
Src: Register direct %rs = %r0 to %r7
Dst: Register direct %rd = %r0 to %r7
CLK
One cycle
Description
(1) Standard
The eight low-order bits of the rs register are transferred to the rd register after being zero-
extended to 16 bits. The eight high-order bits of the rd register are set to 0.
(2) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after a
branch instruction with the "d" bit.
Example
ld.ub
S1C17 CORE MANUAL
(Rev. 1.2)
rd(7:0) ← rs(7:0), rd(15:8) ← 0, rd(23:16) ← 0
9
8
7
|
|
0
1
0
r d
|
|
|
|
|
V
Z
N
|
|
|
–
–
–
; r0 ← r1(7:0) zero-extended
%r0,%r1
Seiko Epson Corporation
6
5
4
3
2
1
0
|
0
0
0
1
r s
|
|
|
|
|
7 DETAILS OF INSTRUCTIONS
7-103
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