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7 DETAILS OF INSTRUCTIONS
cmp.a
%rd, %rs
cmp.a/c
%rd, %rs
cmp.a/nc %rd, %rs
Function
24-bit comparison
Standard)
Extension 1) rs(23:0) - imm13(zero extended)
Extension 2) rs(23:0) - imm24
15 14 13 12 11 10
Code
0
0
1
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0
0
1
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0
0
1
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IL
IE
C
Flag
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– ↔ – ↔ –
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–
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–
–
–
Mode
Src: Register direct %rs = %r0 to %r7
Dst: Register direct %rd = %r0 to %r7
CLK
One cycle
Description
(1) Standard
cmp.a
Subtracts the contents of the rs register from the contents of the rd register, and sets or resets the
flags (C and Z) according to the results. It does not change the contents of the rd register.
(2) Extension 1
ext
cmp.a
Subtracts the 13-bit immediate imm13 from the contents of the rs register, and sets or resets the
flags (C and Z) according to the results. The imm13 is zero-extended into 24 bits prior to the
operation. It does not change the contents of the rd and rs registers.
* This combination does not use the rd register value for comparison.
(3) Extension 2
ext
ext
cmp.a
Subtracts the 24-bit immediate imm24 from the contents of the rs register, and sets or resets
the flags (C and Z) according to the results. It does not change the contents of the rd and rs
registers.
* This combination does not use the rd register value for comparison.
(4) Conditional execution
The /c or /nc suffix on the opcode specifies conditional execution.
cmp.a/c
cmp.a/nc Executed as cmp.a when the C flag is 0 or executed as nop when the flag is 1
In this case, the ext instruction can be used to extend the operand.
The conditional execution instruction above sets/resets the flags (V and Z) according to the
results if it is executed.
7-24
rd(23:0) - rs(23:0)
9
8
7
6
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1
0
1
1
r d
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1
0
1
r d
0
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1
0
1
r d
0
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V
Z
N
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cmp.a
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– ↔ –
cmp.a/c, cmp.a/nc
%rd,%rs
; rd - rs
imm13
%rd,%rs
; rs - imm13
imm11
; imm11(10:0) = imm24(23:13)
imm13
; = imm24(12:0)
%rd,%rs
; rs - imm24
Executed as cmp.a when the C flag is 1 or executed as nop when the flag is 0
Seiko Epson Corporation
5
4
3
2
1
0
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0
0
0
r s
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0
0
0
r s
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1
0
0
r s
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cmp.a
cmp.a/c
cmp.a/nc
S1C17 CORE MANUAL
(REV. 1.2)
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