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7 DETAILS OF INSTRUCTIONS
ld %rd, sign7
Function
16-bit data transfer
Standard)
Extension 1) rd(15:0) ← sign16(15:0), rd(23:16) ← 0
Extension 2) Unusable
15 14 13 12 11 10
Code
1
0
0
|
|
IL
IE
C
Flag
|
|
–
–
–
Mode
Src: Immediate data (signed)
Dst: Register direct %rd = %r0 to %r7
CLK
One cycle
Description
(1) Standard
ld
%rd,sign7
The 7-bit immediate sign7 is loaded to the rd register after being sign-extended to a 16-bit
quantity.
(2) Extension 1
ext
ld
The immediate data is extended into a 16-bit quantity by the ext instruction and it is loaded to
the rd register.
(3) Delayed slot instruction
This instruction may be executed as a delayed slot instruction by writing it directly after
a branch instruction with the "d" bit. In this case, extension of the immediate by the ext
instruction cannot be performed.
Example
ld
%r0,0x7f
7-58
rd(6:0) ← sign7(6:0), rd(15:7) ← sign7(6), rd(23:16) ← 0
9
8
7
6
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1
1
0
r d
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|
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V
Z
N
|
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–
–
–
; rd ← sign7 (sign-extended)
imm13
; = sign16(15:7)
; rd ← sign16, sign7 = sign16(6:0)
%rd,sign7
; r0 ← 0xffff (r0 = 0x00ffff)
Seiko Epson Corporation
5
4
3
2
1
0
sign7
|
|
|
|
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S1C17 CORE MANUAL
(REV. 1.2)
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