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ON-CHIP CODEC FREQUENCY RESPONSE AND GAIN ANALYSIS
6.5
ON-CHIP CODEC FREQUENCY RESPONSE AND GAIN ANALYSIS
This section discusses the DC gain and the frequency response of the A/D and D/A blocks
as a function of the decimation and interpolation ratios.
6.5.1
A/D Section Frequency Response and DC Gain
The DC gain and the A/D comb filter frequency response depends on the decimation rates
selected by programming bits CRS1-CRS0 in the COCR. Table 6-7 shows the DC gain of
the A/D section as a function of the decimation ratio.
CRS1
CRS0
0
0
0
1
1
0
1
1
Eqn. 6-1 gives the A/D transfer function and frequency response function:
Figure 6-4 and Figure 6-5 show an example of the A/D comb filter log magnitude response
using a 2.048 MHz master clock and a decimation ratio of D=128. The figures show the
frequency response in the bands 0-1.024 MHz and 0-16 KHz (Figure 6-4) and in the band
0-4 KHz (Figure 6-5).
6 - 12
Table 6-7 A/D Section DC Gain
Decimation
Ratio Rate
125
128
105
81
Eqn. 6-1 A/D Comb Filter Transfer Function
---------- - 1 z
H z ( )
=
128
sin
c
F f ( )
---------- -
-------------------------------- -
=
3
128
D: decimation ratio
F: Σ∆ modulator clock
c=1 for D=125,128
c=2 for D=105
c=4 for D=81
DSP56156 ON-CHIP SIGMA/DELTA CODEC
DC gain of the
A/D section
dB
-0.618 dB
0.9313(=125
0 dB
0.859 dB
1.104(=2[105
0.118 dB
1.0137(=4[81
3
c
D
–
–
-----------------
3
1 –
1 z
–
3
2πD
×
---------- -
f
2F
2π
×
sin
f
------ -
2F
Actual
3
3
/128
)
1
3
3
]/128
)
3
3
]/128
)
MOTOROLA
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