Motorola DSP56156 Manual page 267

You may also select the bootstrap mode by writing Operating Mode 0 or 1 into the OMR.
This initiates a timed operation to map the bootstrap ROM into the program address space
after a delay to allow execution of a single cycle instruction and then a JMP #<00 (e.g.,
see Bootstrap code for DSP56156) to begin the bootstrap process as described above in
steps 1-4. This technique allows the DSP56156 user to reboot the system (with a different
program if desired).
A.2.2 Bootstrap Firmware Program
Bootstrap ROM contains the bootstrap firmware program that performs initial loading of
the DSP56156 PRAM. The program is written in DSP56100 CORE assembly language.
It contains three separate methods of initializing the PRAM: loading from a byte-wide
memory starting at location P:$C000, loading through the Host Interface, or loading seri-
ally through SSI0. The particular method used is selected by (1) whether Operating Mode
0 or 1 is chosen and (2) the level of program memory location $C000, bit 15.
If the DSP is in Operating Mode 0 it will load 4096 bytes from a byte-wide memory (usually
an EPROM) located in the lower byte beginning at location P:$C000 (see Figure B-1 of
the applications examples given in APPENDIX B APPLICATIONS EXAMPLES ). The
data contents of the EPROM must be organized as shown below.
Address of External
Byte Wide P Memory
P:$C000
P:$C001
•
•
•
P:$CFFE
P:$CFFF
If the DSP is in Operating Mode 1 and bit 15 at location P:$C000 is low then the DSP will
load from the Host Interface. Typically a host microprocessor will be connected to the
DSP56156 Host Interface (see Figure B-3 of the applications examples given in APPEN-
DIX B APPLICATIONS EXAMPLES ). The host microprocessor must write the Host Inter-
face registers TXH and then TXL with the desired contents of PRAM from location
P:$0000 up to P:$0FFF. If less than 2048 words are to be loaded, the host programmer
can exit the bootstrap program and force the DSP56156 to begin executing at location
P:$0000 by setting HF0=1 in the Host Interface during the bootstrap load. In most sys-
tems, the DSP56156 responds so fast that handshaking between the DSP56156 and the
host is not necessary.
If the DSP is in Operating Mode 1 and bit 15 at location P:$C000 is high then the DSP will
load from SSI0 starting with the least significant byte first.
The bootstrap program listing is shown in Figure A-1.
A - 4 BOOTSTRAP MODE — OPERATING MODE 0 OR 1
BOOTSTRAP ROM
Contents Loaded
to Internal PRAM at:
P:$0000 low byte
P:$0000 high byte
•
•
•
P:$07FF low byte
P:$07FF high byte
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