Loop Address Register (La); System Stack (Ss); Stack Pointer (Sp) - Motorola DSP56156 Manual

the previous LC contents stored on the stack. If the LC is not one, it is decremented by
one and the program loop is repeated. The LC may be read under program control. This
allows the number of times a loop has been executed to be determined during execution.
Note that if LC=0 during execution of the DO instruction, the loop will not be executed and
the program will continue with the instruction immediately after the loop end of expression.
LC is also used in the REP instruction.
1.6.3.4

Loop Address Register (LA)

The LA indicates the location of the last instruction word in a program DO loop. This reg-
ister is stacked by a DO instruction and unstacked by end of loop processing or by exe-
cution of an ENDDO or BRKcc instruction. When the instruction word at the address
contained in this register is fetched, the content of LC is checked. If it is not one, the LC
is decremented, and the next instruction is taken from the address at the top of the system
stack; otherwise the PC is incremented, the loop flag is restored (pulled from stack), the
stack pointer is decremented by two, the LA and LC registers are pulled from the stack
and restored, and instruction execution continues normally. The LA register is a read/write
register written into by a DO instruction.
1.6.3.5

System Stack (SS)

The SS is a separate internal RAM, 15 locations "deep", and divided into two banks: High
(SSH) and Low (SSL) each 16 bits wide. SSH stores the PC or LA contents; SSL stores
the LC or SR contents. The PC and SR registers are pushed on the stack for subroutine
calls and long interrupts. These registers are pulled from the stack for subroutine returns
using the RTS instruction (PC only) and for interrupt returns that use the RTI instruction.
The system stack is also used for storing the address of the beginning instruction of a
hardware program loop as well as the SR, LA, and LC register contents just prior to the
start of the loop. This allows nesting of DO loops.
Up to 15 long interrupts, 7 DO loops, or 15 JSRs or combinations of these can be accom-
modated by the stack. Care must be taken when approaching the stack limit. When the
Stack limit is exceeded the data to be stacked will be lost and a non-maskable Stack Error
interrupt will occur. The stack error interrupt occurs after the stack limits have been ex-
ceeded.
1.6.3.6

Stack Pointer (SP)

The stack pointer register (SP) is a 6-bit register that indicates the location of the top of
the SS and the status of the stack (underflow, empty, full, and overflow conditions – see
Table 1-7). The SP is referenced implicitly by some instructions (DO, REP, JSR, RTI, etc.)
or directly by the MOVEC instruction. Note that the stack pointer register is implemented
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