Program Control Unit (Pcu) - Motorola DSP56156 Manual

Modifier
Register
File
m0
m1
ctrl
m2
m3
tains four Address Registers (R0-R3), four Offset Registers (N0-N3), and four Modifier
Registers (M0-M3). The Address Registers are 16-bit registers which may contain ad-
dress or data. Each Address Register may be output to the PAB and XAB1. R3 may be
output to XAB2 when R0, R1, or R2 are output to XAB1. The modifier and offset registers
are 16-bit registers which are normally used to control updating of the address registers.
Any register can also be used as a general purpose register for storage of 16 bit data.
AGU registers may be read or written by the GDB as 16-bit operands. The AGU can gen-
erate two 16-bit addresses every instruction cycle: one for either the XAB1 or PAB and
one for XAB2. The ALU can directly address 65536 locations on the XAB and 65536 lo-
cations on the XAB2. See the DSP56100 Family Manual for additional information.
1.2.5

Program Control Unit (PCU)

The PCU performs instruction fetch, instruction decoding, hardware REP, DO loop con-
trol, and exception processing. The interrupt priority register (IPR) (used to program the
MOTOROLA
DSP56100 CORE BLOCK DIAGRAM DESCRIPTION
GDB(0:15)
PDB(0:15)
Offset
Register
File
n0
Address
n1
Arithmetic
ctrl
n2
n3
n3 only
NB(0:15)
MB(0:15)
XAB2(0:15)
Figure 1-7 AGU Block Diagram
DSP56156 OVERVIEW
UB(0:15)
Temp
r0
r1
ctrl
r2
Unit
r3
RB(0:15)
XAB1(0:15)
Address
Register
File
ctrl
PAB(0:15)
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