Motorola DSP56156 Manual page 218

Note: In normal mode or network mode with one enabled slot, RFS will always be set
when reading data because data is received only in the first active time slot.
RFS is cleared by DSP, SSIx or STOP reset and is not affected by RE.
8.13.4 SSISR Transmitter Underrun Error (TUE) Bit 4
The Transmitter Underrun Error flag is set when the Serial Transmit Shift Register is emp-
ty (no data to be transmitted) and a transmit time slot occurs. When a transmit underrun
error occurs, the previous data will be re-transmitted. A transmit time slot in the normal
mode occurs when the frame sync is asserted. In the network mode, each active time slot
requires transmit data.
TUE does not cause any interrupts; however, TUE does cause a change in the interrupt
vector used for transmit interrupts so that a different interrupt handler may be used for a
transmit underrun condition. If a transmit interrupt occurs with TUE set, the Transmit Data
With Exception Status interrupt will be generated and, if a transmit interrupt occurs with
TUE clear, the Transmit Data Without Errors interrupt will be generated.
TUE is cleared by the DSP, SSIx, or STOP reset. TUE is cleared by reading the SSISR
with TUE set followed by writing TX or TSR.
8.13.5 SSISR Receiver Overrun Error (ROE) Bit 5
The Receiver Overrun Error flag is set when the serial receive shift register is filled and
ready to transfer to the receiver data register (RX) and the RX is already full (i.e. RDF=1).
The Receiver Shift Register is not transferred to RX. ROE does not cause any interrupts;
however, ROE does cause a change in the interrupt vector used so that a different inter-
rupt handler may be used for a receive overrun condition. If a receive interrupt occurs with
ROE set, the Receive Data With Exception Status interrupt will be generated and, if a re-
ceive interrupt occurs with ROE clear, the Receive Data Without Errors interrupt will be
generated.
ROE is cleared by the DSP, SSIx, or STOP reset, and is cleared by reading the SSISR
with ROE set followed by reading the RX. Clearing RE does not affect ROE.
8.13.6 SSISR Transmit Data Register Empty (TDE) Bit 6
The SSI Transmit Data Register Empty flag is set when the contents of the Transmit Data
Register are transferred to the Transmit Shift Register.When set, TDE indicates that data
should be written to the TX or to the TSR before the transmit shift register becomes empty
(which would cause an underrun error).
MOTOROLA SYNCHRONOUS SERIAL INTERFACE (SSI0 and SSI1)
SSI STATUS REGISTER (SSISR)
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