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Transmit Data Register Empty, TXDE, and Host Receive Data Full HRDF, bits are
cleared. This transfer operation sets TXDE and HRDF. The HRX register contains valid
data when the HRDF bit is set. Reading HRX clears HRDF. The DSP may program the
HRIE bit to cause a Host Receive Data interrupt when HRDF is set.
5.7
COMMAND VECTOR REGISTER (CVR)
The Host Command Vector Register (CVR) is used by the host to request vectored ex-
ception service from the DSP of any exception routine in the DSP. The Host Command
feature is independent of any of the data transfer mechanisms in the HI but can be used
to initialize the DSP for data transfer by triggering the appropriate preprogrammed soft-
ware routine.
7
6
5
HC
*
5.7.1
CVR Host Vector (HV) Bits 0 through 4
The 5-bit Host Vector (HV) selects the host command exception address to access the
host command exception routine. When the Host Command Exception is recognized by
the DSP interrupt control logic, the starting address of the exception taken is 2*HV. This
allows the host processor to provide the exception starting address for the Host Command
Exception. The host processor can select any of the 32 possible exception routine starting
addresses in the DSP by writing the exception routine starting address (divided by 2) into
HV. This means that the host processor can force any of the existing exception handlers
(SSI, TIMER, IRQA, IRQB, etc.) and can use any of the reserved or otherwise unused
starting addresses provided they are pre-programmed in the DSP. HV is set to $16 (vector
location $002C) by DSP reset.
The HV should not be used with a value of zero because the
reset location is normally programmed with a JMP instruction.
This will cause an improper fast exception.
5.7.2
CVR Reserved bits – Bits 5 and 6
Reserved bits are unused and are read by the host as zeros. Reserved bits should be writ-
ten as zero for future compatibility.
MOTOROLA
COMMAND VECTOR REGISTER (CVR)
4
3
2
*
HV
CAUTION:
HOST INTERFACE
READ/WRITE
1
0
COMMAND VECTOR
REGISTER (CVR);
ADDRESS $1
5 - 7
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