Figure 6-4 Host Base Address Register (Hbar) (X:$Ffffc5); Figure 6-5 Self Chip Select Logic - Motorola DSP56309 User Manual

Host Interface (HI08)
HI08 DSP Side ProgrammerÕs Model
6.5.5 Host Base Address Register (HBAR)
The HBAR is used in multiplexed bus modes. This register, illustrated in Figure 6-4,
selects the base address where the host side registers are mapped into the bus address
space. The address from the host bus is compared with the base address as programmed
in the base address register. If the addresses match, an internal chip select is generated.
The use of this register by the chip select logic is described in Figure 6-5.
15 14 13 12

Figure 6-4 Host Base Address Register (HBAR) (X:$FFFFC5)

6.5.5.1 HBAR Base Address (BA[10:3]) Bits 0-7
These bits reflect the base address where the host-side registers are mapped into the bus
address space.
6.5.5.2 HBAR Reserved Bits 8-15
These bits are reserved. They are read as 0 and should be written with 0.
DSP Peripheral
6.5.6 Host Port Control Register (HPCR)
The HPCR is a 16-bit, read/write control register by which the DSP controls the HI08
operating mode. Reserved bits are read as 0 and should be written with 0 for future
compatibility. The initialization values for the HPCR bits are described in
Section 6.5.9ÑDSP Side Registers After Reset. The HPCR bits are illustrated in
Figure 6-6.
6-12
11 10 9
HAD[0Ð7]
Latch
HAS
HA[8:10]
Base
Address
Register
Data Bus

Figure 6-5 Self Chip Select Logic

DSP56309UM/D
8 7 6 5
BA10 BA9 BA8
A[3:7]
8 bits
4 3 2 1
BA7 BA6 BA5 BA4
Chip select
MOTOROLA
0
BA3
AA0665
AA0666