External Data Bus; External Bus Control; Table 2-7 External Data Bus Signals; Table 2-8 External Bus Control Signals - Motorola DSP56309 User Manual

24-bit digital signal processor
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Signal/Connection Descriptions
External Memory Expansion Port (Port A)
2.6.2

External Data Bus

External data bus signals for the DSP56309 are listed in Table 2-7.
Signal
Type
Name
D0ÐD23
Input/
Output
2.6.3

External Bus Control

External bus control signal descriptions for the DSP56309 are listed in Table 2-8.
Signal
Type
Name
AA0Ð
Output
AA3/
RAS0Ð
RAS3
RD
Output
WR
Output
2-10

Table 2-7 External Data Bus Signals

State
During
Reset
weakly
Data BusÑWhen the DSP is the bus master,
driven by
D0ÐD23 are active-high, bidirectional
bus keeper
input/outputs that provide the bidirectional
data bus for external program and data
memory accesses. Otherwise, D0ÐD23 are
weakly driven by the bus keeper.

Table 2-8 External Bus Control Signals

State
During
Reset
Tri-stated
Address Attribute or Row Address StrobeÑWhen
defined as AA, these signals can be used as chip
selects or additional address lines. When defined as
RAS, these signals can be used as RAS for DRAM
interface. These signals are tri-statable outputs with
programmable polarity.
Tri-stated
Read EnableÑWhen the DSP is the bus master, RD
is an active-low output that is asserted to read
external memory on the data bus (D0ÐD23).
Otherwise, RD is tri-stated.
Tri-stated
Write EnableÑWhen the DSP is the bus master, WR
is an active-low output that is asserted to write
external memory on the data bus (D0ÐD23).
Otherwise, the signals are tri-stated.
DSP56309UM/D
Signal Description
Signal Description
MOTOROLA

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