Dsp56300 Core Functional Blocks; Data Alu; Data Alu Registers - Motorola DSP56309 User Manual

DSP56309 Overview

DSP56300 Core Functional Blocks

1.6

DSP56300 CORE FUNCTIONAL BLOCKS

The DSP56300 core provides the following functional blocks:
¥ Data ALU
¥ AGU
¥ PCU
¥ PLL and Clock Oscillator
¥ JTAG TAP and OnCE module
¥ Memory
In addition, the DSP56309 provides a set of on-chip peripherals, described in
Section 1.10.
1.6.1

Data ALU

The Data ALU performs all the arithmetic and logical operations on data operands in the
DSP56300 core. The components of the Data ALU are as follows:
¥ Fully pipelined 24 ´ 24-bit parallel multiplier-accumulator (MAC)
¥ Bit field unit, comprising a 56-bit parallel barrel shifter (fast shift and
normalization; bit stream generation and parsing)
¥ Conditional ALU instructions
¥ 24-bit or 16-bit arithmetic support under software control
¥ Four 24-bit input general-purpose registers: X1, X0, Y1, and Y0
¥ Six Data ALU registers (A2, A1, A0, B2, B1, and B0) that are concatenated into two
general-purpose, 56-bit accumulators, A and B, accumulator shifters
¥ Two data bus shifter/limiter circuits
1.6.1.1

Data ALU Registers

The Data ALU registers can be read or written over the X data bus (XDB) and the Y data
bus (YDB) as 16- or 32-bit operands. The source operands for the Data ALU, which can
be 16, 32, or 40 bits, always originate from Data ALU registers. The results of all
Data ALU operations are stored in an accumulator.
1-8 DSP56309UM/D MOTOROLA