Motorola DSP56309 User Manual page 290

the chip would not have entered debug mode. The OPABEX register can only be read
through the JTAG port. This register is not affected by the operations performed during
debug mode.
10.9.4 Trace Buffer
The trace buffer stores the addresses of the last 12 change-of-flow instructions that were
executed, as well as the address of the last executed instruction. The trace buffer is
implemented as a circular buffer containing 12 17-bit registers and one 4-bit counter. All
the registers have the same address, but any read access to the trace buffer address
causes the counter to increment, thus pointing to the next trace buffer register. The
registers are serially available to the external command controller through their common
trace buffer address. Figure 10-10 on page 10-22 shows the block diagram of the trace
buffer. The trace buffer is not affected by the operations performed during debug mode
except for the trace buffer pointer increment when reading the trace buffer. When
entering debug mode, the trace buffer counter is pointing to the trace buffer register
containing the address of the last executed instructions. The first trace buffer read
obtains the oldest address and the following trace buffer reads get the other addresses
from the oldest to the newest, in order of execution.
Notes: 1. To insure trace buffer coherence, a complete set of 12 reads of the Trace
buffer must be performed. This is necessary due to the fact that each read
increments the trace buffer pointer, thus pointing to the next location.
After 12 reads, the pointer indicates the same location as before starting the
read procedure.
2. On any change of flow instruction, the trace buffer stores both the address
of the change of flow instruction, as well as the address of the target of the
change of flow instruction. In the case of conditional change of flows, the
address of the change of flow instruction is always stored (regardless of the
fact that the change of flow is true or false), but if the conditional change of
flow is false (i.e., not taken) the address of the target is not stored. In order
to facilitate the program trace reconstruction, every trace buffer location
has an additional Ôinvalid bitÕ (bit 24). If a conditional change of flow
instruction has a Ôcondition falseÕ, the invalid bit is set, thus marking this
instruction as not taken. Therefore, it is imperative to read 17 bits of data
when reading the 12 trace buffer registers. Since data is read LSB first, the
invalid bit is the first bit to be read.
MOTOROLA DSP56309UM/D
On-Chip Emulation Module
Debugging Resources
10-21