Motorola DSP56309 User Manual page 154

6.6.3.2 ISR Transmit Data Register Empty (TXDE) Bit 1
The TXDE bit indicates that the transmit byte registers (TXH:TXM:TXL) are empty and
can be written by the host processor. TXDE is set when the contents of the transmit byte
registers are transferred to the HRX register. TXDE is cleared when the transmit (TXL or
TXH according to HLEND bit) register is written by the host processor. The host
processor can set TXDE using the initialize function. TXDE can assert the external HTRQ
signal if the TREQ bit is set. Regardless of whether the TXDE interrupt is enabled, TXDE
indicates whether the TX registers are full and data can be latched in so that the host
processor can use polling techniques.
6.6.3.3 ISR Transmitter Ready (TRDY) Bit 2
The TRDY status bit indicates that TXH:TXM:TXL, and the HRX registers are empty.
and
TRDY = TXDE
If TRDY is set, the data that the host processor writes to TXH:TXM:TXL is immediately
transferred to the DSP side of the HI08. This feature has many applications. For example,
if the host processor issues a host command which causes the DSP56309 to read the
HRX, the host processor can be guaranteed that the data it just transferred to the HI08 is
that being received by the DSP56309.
6.6.3.4 ISR Host Flag 2 (HF2) Bit 3
HF2 indicates the state of host flag 2 in the HCR on the DSP side. HF2 can be changed
only by the DSP56309, as documented in Section 6.5.3.4ÑHCR Host Flags 2,3 (HF[3:2])
Bits 3, 4 on page 6-10.
6.6.3.5 ISR Host Flag 3 (HF3) Bit 4
HF3 indicates the state of Host Flag 3 in the HCR on the DSP side. HF3 can be changed
only by the DSP56309, as documented in Section 6.5.3.4ÑHCR Host Flags 2,3 (HF[3:2])
Bits 3, 4 on page 6-10.
6.6.3.6 ISR Reserved Bits 5, 6
These bits are reserved. They are read as 0 and should be written with 0.
6.6.3.7 ISR Host Request (HREQ) Bit 7
HREQ indicates the status of the external transmit and receive request output signals
(HTRQ and HRRQ) if HDRQ is set. If HDRQ is cleared, it indicates the status of the
external host request output signal (HREQ). Table 6-11 shows possible settings of
HRDQ and HDEQ and their effects.
MOTOROLA
HRDF
DSP56309UM/D
HI08-External Host ProgrammerÕs Model
Host Interface (HI08)
6-27