Figure 10-8 Once Trace Logic Block Diagram; Once Trace Logic - Motorola DSP56309 User Manual

On-Chip Emulation Module

OnCE Trace Logic

breakpoint logic is reset and that no previous events can affect the new breakpoint event
selected. The breakpoint counter is cleared by a hardware RESET signal.
10.5.6.8 Reserved Bits 12-15
Bits 12Ð15 are reserved for future use. They are read as 0 and should be written with 0 for
future compatibility.
10.6 OnCE TRACE LOGIC
Using the OnCE trace logic, execution of instructions in single or multiple steps is
possible. The OnCE trace logic causes the chip to enter debug mode after the execution
of one or more instructions and wait for OnCE commands from the debug serial port.
The OnCE trace logic block diagram is shown in Figure 10-8.
End of Instruction
TDI
DEC
TDO
Trace Counter
TCK
Count = 0
ISTRACE
AA0708

Figure 10-8 OnCE Trace Logic Block Diagram

Trace mode has a counter associated with it so that more than one instruction can be
executed before returning back to debug mode. The objective of the counter is to allow
the user to take multiple instruction steps real time before entering debug mode. This
feature helps the software developer debug sections of code that do not have a normal
flow or are getting hung up in infinite loops. The OTC also enables the user to count the
number of instructions executed in a code segment.
To enable trace mode, the counter is loaded with a value, the program counter is set to
the start location of the instruction(s) to be executed real time, the TME bit is set in the
MOTOROLA DSP56309UM/D 10-15