Figure 10-9 Once Pipeline Information And Gdb Registers - Motorola DSP56309 User Manual

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Figure 10-9 OnCE Pipeline Information and GDB Registers

10.8.1 OnCE PDB Register (OPDBR)
The OPDBR is a 24-bit latch that stores the value of the program data bus generated by
the last program memory access of the core before debug mode is entered. The OPDBR
register can be read or written through the JTAG port. This register is affected by the
operations performed during debug mode and must be restored by the external
command controller when returning to normal mode.
10.8.2 OnCE PIL Register (OPILR)
The OPILR is a 24-bit latch that stores the value of the instruction latch before debug
mode is entered. OPILR can only be read through the JTAG port.
Note: Since the instruction latch is affected by the operations performed during
debug mode, it must be restored by the external command controller when
returning to normal mode. Since there is no direct write access to the
instruction latch, the task of restoring is accomplished by writing to OPDBR
with no-GO and no-EX. In this case the data written on PDB is transferred into
the instruction latch.
MOTOROLA
GDB Register (OGDBR)
PDB Register (OPDBR)
PIL Register (OPILR)
TCK
DSP56309UM/D
On-Chip Emulation Module
Pipeline Information and OGDB Register
GDB
TDI
PDB
PIL
AA0709
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