Motorola DSP56309 User Manual page 192

the transmit last slot interrupt is disabled. The use of the transmit last slot interrupt is
described in Section 7.5.3ÑESSI Exceptions.
TLIE is cleared by either a hardware RESET signal or a software RESET instruction. TLIE
is disabled when the ESSI is in on-demand mode (DC = $0).
7.4.2.21 Receive Last Slot Interrupt Enable (RLIE) Bit 21
Setting the RLIE bit enables an interrupt after the last slot of a frame ends when the ESSI
is in network mode. When RLIE is set, the DSP is interrupted after the last slot in a frame
ends regardless of the receive mask register setting. When RLIE is cleared, the receive
last slot interrupt is disabled. The use of the receive last slot interrupt is described in
Section 7.5.3ÑESSI Exceptions.
RLIE is cleared by either a hardware RESET signal or a software RESET instruction.
RLIE is disabled when the ESSI is in on-demand mode (DC = $0).
7.4.2.22 Transmit Exception Interrupt Enable (TEIE) Bit 22
When the TEIE bit is set, the DSP is interrupted when both TDE and TUE in the ESSI
Status Register are set. When TEIE is cleared, this interrupt is disabled. The use of the
transmit interrupt is described in Section 7.5.3ÑESSI Exceptions. Reading the status
register, followed by writing to all the data registers of the enabled transmitters, clears
both TUE and the pending interrupt.
TEIE is cleared by either a hardware RESET signal or a software RESET instruction.
7.4.2.23 Receive Exception Interrupt Enable (REIE) Bit 23
When the REIE bit is set, the DSP is interrupted when both RDF and ROE in the ESSI
status register are set. When REIE is cleared, this interrupt is disabled. The use of the
receive interrupt is described in Section 7.5.3ÑESSI Exceptions. Reading the status
register followed by reading the receive data register clears both ROE and the pending
interrupt.
REIE is cleared by either a hardware RESET signal or a software RESET instruction.
7.4.3 ESSI Status Register (SSISR)
The SSISR (in Figure 7-4 on page 7-9) is a 24-bit, read-only status register used by the
DSP to read the status and serial input flags of the ESSI. The SSISR bits are documented
in the following paragraphs.
MOTOROLA
Enhanced Synchronous Serial Interface (ESSI)
DSP56309UM/D
ESSI Programming Model
7-27