Motorola DSP56309 User Manual page 141

Host Interface (HI08)
HI08 DSP Side ProgrammerÕs Model
6.5.6.5 HPCR Host Request Enable (HREN) Bit 4
The HREN bit controls the host request signals. If HREN is set and the HI08 is in the
single host request mode (HDRQ is cleared in the host interface control register (ICR)),
HREQ/HTRQ is configured as the host request (HREQ) output. If HREN is cleared,
HREQ/HTRQ and HACK/HRRQ are configured as GPIO signals according to the value
of the HDDR and HDR.
If HREN is set in the double host request mode (HDRQ is set in the ICR), HREQ/HTRQ
is configured as the host transmit request (HTRQ) output and HACK/HRRQ as the host
receive request (HRRQ) output. If HREN is cleared, HREQ/HTRQ and HACK/HRRQ
are configured as GPIO signals according to the value of the HDDR and HDR.
6.5.6.6 HPCR Host Acknowledge Enable (HAEN) Bit 5
The HAEN bit controls the HACK signal. In the single host request mode (HDRQ is
cleared in the ICR), if HAEN and HREN are both set, HACK/HRRQ is configured as the
host acknowledge (HACK) input. If HAEN or HREN is cleared, HACK/HRRQ is
configured as a GPIO signal according to the value of the HDDR and HDR. In the double
host request mode (HDRQ is set in the ICR), HAEN is ignored.
6.5.6.7 HPCR Host Enable (HEN) Bit 6
If HEN is set, the HI08 operates as the host interface. If HEN is cleared, the HI08 is not
active, and all the HI08 signals are configured as GPIO signals according to the value of
the HDDR and HDR.
6.5.6.8 HPCR Reserved Bit 7
This bit is reserved. It is read as 0 and should be written as 0.
6.5.6.9 HPCR Host Request Open Drain (HROD) Bit 8
The HROD bit controls the output drive of the host request signals. In the single host
request mode (HDRQ is cleared in ICR), if HROD is cleared and host requests are
enabled (HREN is set and HEN is set in HPCR), the HREQ signal is always driven by the
HI08. If HROD is set and host requests are enabled, the HREQ signal is an open drain
output. In the double host request mode (HDRQ is set in the ICR), if HROD is cleared
and host requests are enabled (HREN is set and HEN is set in the HPCR), the HTRQ and
HRRQ signals are always driven. If HROD is set and host requests are enabled, the
HTRQ and HRRQ signals are open drain outputs.
6.5.6.10 HPCR Host Data Strobe Polarity (HDSP) Bit 9
If HDSP is cleared, the data strobe signals are configured as active low inputs, and data
is transferred when the data strobe is low. If HDSP is set, the data strobe signals are
configured as active high inputs, and data is transferred when the data strobe is high.
The data strobe signals are either HDS by itself or both HRD and HWR together.
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