Table 6-8 Treq And Rreq Modes (Hdrq = 0); Table 6-9 Treq And Rreq Modes (Hdrq = 1) - Motorola DSP56309 User Manual

24-bit digital signal processor
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6.6.1.1
ICR Receive Request Enable (RREQ) Bit 0
The RREQ bit controls the HREQ signal for host receive data transfers. RREQ enables
host requests via the host request (HREQ or HRRQ) signal when the receive data register
full (RXDF) status bit in the ISR is set. If RREQ is cleared, RXDF interrupts are disabled.
If RREQ and RXDF are set, the host request signal (HREQ or HRRQ) is asserted.
6.6.1.2
ICR Transmit Request Enable (TREQ) Bit 1
TREQ enables host requests via the host request (HREQ or HTRQ) signal when the
transmit data register empty (TXDE) status bit in the ISR is set. If TREQ is cleared, TXDE
interrupts are disabled. If TREQ and TXDE are set, the host request signal is asserted.
Table 6-8 and Table 6-9 summarize the effect of RREQ and TREQ on the HREQ and
HRRQ signals.
TREQ
RREQ
0
0
0
1
1
0
1
1
TREQ
RREQ
0
0
0
1
1
0
1
1
6.6.1.3
ICR Double Host Request (HDRQ) Bit 2
If cleared, the HDRQ bit configures HREQ/HTRQ and HACK/HRRQ as HREQ and
HACK, respectively. If HDRQ is set, HREQ/HTRQ and HACK/HRRQ are configured
as HTRQ and HRRQ, respectively.
MOTOROLA

Table 6-8 TREQ and RREQ modes (HDRQ = 0)

RXDF and TXDE Request (Interrupts)

Table 6-9 TREQ and RREQ modes (HDRQ = 1)

HTRQ Single
No Interrupts (Polling)
No Interrupts (Polling)
TXDE Request (Interrupt)
TXDE Request (Interrupt)
DSP56309UM/D
HI08-External Host ProgrammerÕs Model
HREQ Signal
No Interrupts (Polling)
RXDF Request (Interrupt)
TXDE Request (Interrupt)
No Interrupts (Polling)
RXDF Request (Interrupt)
No Interrupts (Polling)
RXDF Request (Interrupt)
Host Interface (HI08)
HRRQ Signal
6-23

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