Fujitsu M10 Product Notes page 81

Table 6-2
I/O device paths at PCI expansion unit side (at initial implementation: a two-CPU) (continue d)
PCI#7 /pci@vvvv/pci@4/pci@0/pci@u/pci@0/pci@0/pci@0/pci@1/pci@0/pci@10/pci@0/pci@11/****@0
PCI#8 /pci@vvvv/pci@4/pci@0/pci@u/pci@0/pci@0/pci@0/pci@1/pci@0/pci@11/pci@0/pci@0/****@0
PCI#9 /pci@vvvv/pci@4/pci@0/pci@u/pci@0/pci@0/pci@0/pci@1/pci@0/pci@11/pci@0/pci@1/****@0
PCI#10 /pci@vvvv/pci@4/pci@0/pci@u/pci@0/pci@0/pci@0/pci@1/pci@0/pci@11/pci@0/pci@10/****@0
PCI#11 /pci@vvvv/pci@4/pci@0/pci@u/pci@0/pci@0/pci@0/pci@1/pci@0/pci@11/pci@0/pci@11/****@0
I/O device paths of logical system board
As for the I/O device paths of LSB#1 to LSB#15, the top device nodes (/pci@vvvv)
shown in Table 6-1 will be the device nodes shown in Table 6-2. Other nodes are the
same as Table 6-1.
For example, in case of LSB#1, replace the device nodes shown in Table 6-1 as the
following order. Replace the device nodes of LSB#2 to LSB#15 as the same way.
/pci@8000 to /pci@8800, /pci@8100 to /pci@8900, /pci@8200 to /pci@8a00, and
/pci@8300 to /pci@8b00
Table 6-3
LSB number
LSB#1
LSB#2
LSB#3
LSB#4
LSB#5
I/O device paths of LSB#1 to LSB#15 (at initial implementation: a two-CPU)
Device path
/pci@8800/...
/pci@8900/...
/pci@8a00/...
/pci@8b00/...
/pci@9000/...
/pci@9100/...
/pci@9200/...
/pci@9300/...
/pci@9800/...
/pci@9900/...
/pci@9a00/...
/pci@9b00/...
/pci@a000/...
/pci@a100/...
/pci@a200/...
/pci@a300/...
/pci@a800/...
/pci@a900/...
/pci@aa00/...
/pci@ab00/...
Chapter 6 Information on SPARC M10-4S Hardware 69