Figure 23.73 I/O Port Input/Output Timing; Table 23.34 Pcic Signal Timing (With Pcireq/Pcignt Port Settings In Non-Host Mode) - Hitachi SH7751 Hardware Manual

Table 23.34 PCIC Signal Timing
(With PCIREQ/PCIGNT Port Settings in Non-Host Mode)
HD6417751VF133: V
Pin

 
/MD9

 
/MD10

 
 
–
CKIO
(read)
(write)
= 3.0 to 3.6 V, V
DDQ DD
Item
Output data delay
time
Input hold time
Input setup time
Output data delay
time
t
PCIPORTD

Figure 23.73 I/O Port Input/Output Timing

= 1.5 V typ, T = –20 to +75
a
Symbol Min
t —
PCIPORTD
t 1.5
PCIPORTH
t 3.5
PCIPORTS
t —
PCIPORTD
t
t
PCIPORTS
PCIPORTH
t
Rev. 3.0, 04/02, page 1027 of 1064


C, C = 30 pF, PLL2 on
L
Max Unit Figure
10 ns 23.73
— ns 23.73
— ns 23.73
10 ns 23.73
PCIPORTD