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Bit 4—Reserved: This bit always returns 0 when read. Always write 0 to this bit.
Bit 3—PCI Address Space Type (IOSEL): Type of PCI address space during transfer
Bit 3: IOSEL
0
1
Bit 2—Transfer Direction (DIR): Transfer direction during DMA transfer
Bit 2: DIR
0
1
Bit 1—Forced DMA Transfer Termination (DMASTOP): Forced termination of DMA transfer
Bit 1: DMASTOP
When writing
When reading
Bit 0—DMA Transfer Start Control (DMASTRT): Controls the starting of DMA transfer.
Bit 0: DMASTRT
When writing
When reading
Rev. 3.0, 04/02, page 864 of 1064
Description
Memory space
I/O space
Description
Transfer from PCI bus to local bus (SH bus)
Transfer from local bus (SH bus) to PCI bus
0
1
0
1
0
1
Description
Writing of 0 is ignored.
Forced termination of DMA transfer
When DMA transfer stops due to forced DMA transfer
termination, 1 is set
Description
Ignored
Start
End of transfer
Busy (in transfer)
(Initial value)
(Initial value)
(Initial value)
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