Table 14.5 Selecting On-Chip Peripheral Module Request Mode With Rs Bits - Hitachi SH7751 Hardware Manual

Table 14.5 Selecting On-Chip Peripheral Module Request Mode with RS Bits

RS3 RS2 RS1 RS0
1 0 0 0
1
1 0
1
1 0 0
1
1 0
TMU: Timer unit
SCI: Serial communication interface
SCIF: Serial communication interface with FIFO
Notes: * External memory or memory-mapped external device
1. SCI/SCIF burst transfer setting is prohibited.
2. If input capture interrupt acceptance is set for multiple channels and DE =1 for each
channel, processing will be executed on the highest-priority channel in response to a
single input capture interrupt.
3. A DMA transfer request by means of an input capture interrupt can be canceled by
setting TCR2.ICPE1 = 0 and TCR2.ICPE0 = 0 in the TMU.
To output a transfer request from an on-chip peripheral module, set the DMA transfer request
enable bit for that module and output a transfer request signal.
For details, see sections 12, Timer Unit (TMU), 15, Serial Communication Interface (SCI), and
16, Serial Communication Interface with FIFO (SCIF).
When a DMA transfer corresponding to a transfer request signal from an on-chip peripheral
module shown in table 14.5 is carried out, the signal is discontinued automatically. This occurs
every transfer in cycle steal mode, and in the last transfer in burst mode.
DMAC Transfer DMAC Transfer
Request Source Request Signal
SCI transmitter SCTDR1 (SCI
transmit-data-
empty transfer
request)
SCI receiver SCRDR1 (SCI
receive-data-full
transfer request)
SCIF transmitter SCFTDR2 (SCIF
transmit-data-
empty transfer
request)
SCIF receiver SCFRDR2 (SCIF
receive-data-full
transfer request)
TMU channel 2 Input capture
occurrence
TMU channel 2 Input capture
occurrence
TMU channel 2 Input capture
occurrence
Transfer Transfer
Source Destination Bus Mode
External* SCTDR1
SCRDR1 External*
External* SCFTDR2
SCFRDR2 External*
External* External*
External* On-chip
peripheral
On-chip External*
peripheral
Rev. 3.0, 04/02, page 489 of 1064
Cycle steal
mode
Cycle steal
mode
Cycle steal
mode
Cycle steal
mode
Burst/cycle
steal mode
Burst/cycle
steal mode
Burst/cycle
steal mode