Hitachi SH7751 Hardware Manual page 67

Table 1.3 Pin Functions (cont)
Pin
No. Number Pin Name

 
116 U16

 
117 V16

 
118 W16
MD10
119 W14 VDDQ
120 W15 VSSQ

 
121 Y16
MD9
122 U17 IDSEL

123 V17

 
124 W17
125 Y17 PCICLK

 
126 W18


 
127 Y18


128 Y19
129 Y20 AD31
130 W20 AD30
131 P18 VDDQ
132 V18 VSSQ
133 V19 AD29
134 V20 AD28
135 U18 AD27
Rev. 3.0, 04/02, page 28 of 1064
I/O Function
O Bus grant
(host function)
1
I* Bus request
(host function)
1
/ I* Bus request
(host function)/
mode
Power IO VDD
Power IO GND
1
/ I* Bus request
(host function)/
mode
I Configuration
device select
O Interrupt (async)
O Reset output
I PCI input
clock
/ O Bus grant (host
function)/
bus request
/ I Bus request
(host function)/
bus grant
I/O System error
I/O PCI address/
data/port
I/O PCI address/
data/port
Power IO VDD
Power IO GND
I/O PCI address/
data/port
I/O PCI address/
data/port
I/O PCI address/
data/port
Reset SRAM DRAM
MD10
MD9
(Port) (Port)
(Port) (Port)
(Port) (Port)
(Port) (Port)
(Port) (Port)
Memory Interface
SDRAM PCMCIA
(Port) (Port)
(Port) (Port)
(Port) (Port)
(Port) (Port)
(Port) (Port)
MPX
(Port)
(Port)
(Port)
(Port)
(Port)