Figure 22.5 Example Of Dma Transfer Control Register Settings - Hitachi SH7751 Hardware Manual

31
PCIDMABT
31 28
PCIDLA
31 26 25
PCIDTC
31
PCIDPA
31
PCIDCR

Figure 22.5 Example of DMA Transfer Control Register Settings

1 0
Arbitration mode
0
Local address
0
Transfer count
0
PCI address
11 10 0
Transfer control
0: Fixed priority
1: Pseudo round-robin
External memory
space
H'0000 0000
Area 0: H'00000000 to
H'0000 0004
.
H'03FFFFFF
.
.
Area 1: H'04000000 to
.
H'07FFFFFF
Area 2: H'0800 0000 to
H'0BFFFFFF
Area 3: H'0C000000 to
H'0FFFFFFF
Area 4: H'10000000 to
H'13FFFFFF
Area 5: H'14000000 to
.
H'17FFFFFF
.
.
Area 6: H'18000000 to
H'1BFFFFFF
H'1BFF FFFC
32 bits
PCI memory/
I/O space
H'0000 0000
H'0000 0004
H'0000 000C
.
.
.
.
.
.
H'FFFF FFFC
32 bits
Rev. 3.0, 04/02, page 893 of 1064
DMA
transfer