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22.2
PCIC Register Descriptions
22.2.1
PCI Configuration Register 0 (PCICONF0)
Bit:
31
DEVID15 DEVID14 DEVID13 DEVID12 DEVID11 DEVID10 DEVID9
Initial value:
0
PCI-R/W:
R
PP Bus-R/W:
R
Bit:
23
DEVID7
Initial value:
0
PCI-R/W:
R
PP Bus-R/W:
R
Bit:
15
VNDID15 VNDID14 VNDID13 VNDID12 VNDID11 VNDID10 VNDID9 VNDID8
Initial value:
0
PCI-R/W:
R
PP Bus-R/W:
R
Bit:
7
VNDID7 VNDID6 VNDID5 VNDID4 VNDID3 VNDID2 VNDID1 VNDID0
Initial value:
0
PCI-R/W:
R
PP Bus-R/W:
R
Note: * These values differ between SH7751 and SH7751R. Indicated with * are for the SH7751R.
PCI configuration register 0 (PCICONF0) is a 32-bit read-only register that includes the device ID
and vender ID PCI configuration registers stipulated in the PCI local bus specifications. The
SH7751 ID (H'3505) or the SH7751R ID (H'350E) is read from bits 31 to 16; the Hitachi ID
(H'1054) is read from bits 15 to 0.
All bits of the PCICONF0 are fixed in hardware.
30
29
0
1
R
R
R
R
22
21
DEVID6
DEVID5
DEVID4
0
0
R
R
R
R
14
13
0
0
R
R
R
R
6
5
1
0
R
R
R
R
28
27
1
0
R
R
R
R
20
19
DEVID3
DEVID2
0
0/1*
R
R
R
R
12
11
1
0
R
R
R
R
4
3
1
0
R
R
R
R
Rev. 3.0, 04/02, page 811 of 1064
26
25
24
DEVID8
1
0
R
R
R
R
18
17
16
DEVID1
DEVID0
1
0/1*
1/0*
R
R
R
R
10
9
0
0
R
R
R
R
2
1
1
0
R
R
R
R
1
R
R
R
R
8
0
R
R
0
0
R
R
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