Hitachi SH7751 Hardware Manual page 872

Superh risc engine
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Bits 23 to 16—Minimum Latency Specification (MGNT 7 to 0): Specify the burst interval
required by the PCI device (not supported).
Bits 15 to 8—Interrupt Pin Specification (IPIN7 to 0)
Bits 15 to 8:
IPIN7 to 0
H'01
H'02
H'03
H'04
H'05 to H'FF
Bits 7 to 0—Interrupt Line Specification (ILIN7 to 0): Specifies an interrupt line of a system to
which interrupt output used by the PCIC is connected.
Description

used

used

used

used
Reserved bits
(Initial value)
Rev. 3.0, 04/02, page 833 of 1064

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