Table 21.3 Structure of Boundary Scan Register (cont)
No.
Pin name
89
A4
88
A3
87
A3
86
A2
85
A2
84
A1
83
A1
82
A0
81
A0
80
79
78
77
76
75
74
CKE
73
CKE
72
71
70
RD/
69
RD/
68
67
66
65
64
D15
63
D15
62
D15
61
D14
60
D14
Note: CTL is a low-active signal. The relevant pin is driven to the OUT state when CTL is set
LOW.
/
/
/
/
/DQM1
/DQM1
/DQM0
/DQM0
Type
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
CTL
OUT
IN
CTL
OUT
IN
CTL
Rev. 3.0, 04/02, page 795 of 1064