Register Descriptions; Instruction Register (Sdir) - Hitachi SH7751 Hardware Manual

21.2

Register Descriptions

21.2.1

Instruction Register (SDIR)

The instruction register (SDIR) is a 16-bit register that can only be read by the CPU. In the initial
state, bypass mode is set. The value (command) is set from the serial input pin (TDI). SDIR is



initialized by the
from the H-UDI, writing is possible regardless of the CPU mode. Operation is undefined if a
reserved command is set in this register.
Bit: 15
TI7
Initial value: 1
R/W: R
Bit: 7
—
Initial value: 1
R/W: R
Bits 15 to 8—Test Instruction Bits (TI7–TI0)
Bit 15: Bit 14: Bit 13:
TI7 TI6 TI5
0 0 0
0 0 0
0 1 1
0 1 1
1 0 1
1 1 1
Other than above
Bits 7 to 0—Reserved: These bits are always read as 1, and should only be written with 1.
pin or in the TAP Test-Logic-Reset state. When this register is written to
14 13
TI6 TI5
1 1
R R
6 5
— —
1 1
R R
Bit 12: Bit 11: Bit 10:
TI4 TI3 TI2
0 0 0
0 0 1
0 — —
1 — —
— — —
1 1 1
12 11
TI4 TI3 TI2
1 1
R R
4 3
— —
1 1
R R
Bit 9: Bit 8:
TI1 TI0 Description
0 0 EXTEST
0 0 SAMPLE/PRELOAD
— — H-UDI reset negate
— — H-UDI reset assert
— — H-UDI interrupt
1 1 Bypass mode (Initial value)
Reserved
Rev. 3.0, 04/02, page 781 of 1064
10 9
TI1 TI0
1 1
R R
2 1
— —
1 1
R R
8
1
R
0
—
1
R