Table 13.8 32-Bit External Device/Big-Endian Access And Data Alignment - Hitachi SH7751 Hardware Manual

Data Configuration
MSB
Byte
MSB
Word Data 15–8
MSB
Longword Data 31–24
MSB
Quadword Data
63–56

Table 13.8 32-Bit External Device/Big-Endian Access and Data Alignment

Operation
Access
Size Address No. D31–D24 D23–D16 D15–D8 D7–D0
Byte 4n 1
4n+1 1
4n+2 1
4n+3 1
Word 4n 1
4n+2 1
Long- 4n 1
word
Quad- 8n 1
word
8n+4 2
Rev. 3.0, 04/02, page 360 of 1064
LSB
Data 7–0
Data 7–0
Data 23–16
Data Data
55–48 47–40
Data Bus
Data —
7–0
— Data
7–0
— —
— —
Data Data
15–8 7–0
— —
Data Data
31–24 23–16
Data Data
63–56 55–48
Data Data
31–24 23–16
LSB
Data 15–8
Data Data
39–32 31–24





DQM3
— — Asserted
— —
Data —
7–0
— Data
7–0
— — Asserted Asserted
Data Data
15–8 7–0
Data Data Asserted Asserted Asserted Asserted
15–8 7–0
Data Data Asserted Asserted Asserted Asserted
47–40 39–32
Data Data Asserted Asserted Asserted Asserted
15–8 7–0
Data 7–0
Data Data
23–16 15–8
Strobe Signals





, , ,
 
 
, , ,
DQM2 DQM1
Asserted
Asserted
Asserted Asserted
LSB
LSB
Data
7–0



,


,
DQM0
Asserted