Pin Arrangement; Figure 1.2 Pin Arrangement (256-Pin Qfp) - Hitachi SH7751 Hardware Manual

1.3

Pin Arrangement

XTAL2 193
EXTAL2 194
VDD-RTC 195
VSS-RTC 196
CA 197
198
199
200
NMI 201
/ 202
203
/
MD6/ 204
205
206
TXD
207
208
209
210
MD2/RXD2 211
RXD 212
TCLK 213
MD8/ 214
SCK 215
MD1/TXD2 216
MD0/SCK2 217
MD7/ 218
AUDSYNC 219
220
AUDCK
221
222
223
AUDATA0
AUDATA1 224
225
226
AUDATA2 227
AUDATA3 228
Reserved 229
MD3/ 230
MD4/ 231
MD5 232
233
234
DACK0 235
DACK1 236
237
DRAK0
DRAK1 238
239
240
STATUS0 241
STATUS1 242
243
244
/BRKACK 245
TDO 246
247
248
VDD-PLL2 249
VSS-PLL2 250
VDD-PLL1 251
VSS-PLL1 252
VDD-CPG 253
254
VSS-CPG
XTAL 255
EXTAL 256
Note: Power must be supplied to the on-chip PLL power supply pins (VDD-PLL1, VDD-PLL2, VSS-PLL1,
VSS-PLL2, VDD-CPG, VSS-CPG, VDD-RTC, and VSS-RTC) regardless of whether or not the PLL
circuits, crystal resonator, and RTC are used.
QFP256
(Top view)
VDD (internal)
VSS (internal)
VDDQ (IO)
VSSQ (IO)

Figure 1.2 Pin Arrangement (256-Pin QFP)

128
127
126
125 PCICLK
124
123
122 IDSEL
121
120
119
118
117
116
115
114
113
112
111
110 /
109 /
108 A25
107 A24
106
105
104 A23
103 A22
102 A21
101
A20
100 A19
99 A18
98
97
96 D31
95
D30
94
93
92 D29
91 D28
90 D27
89 D26
88 D25
87 D24
86 D23
85 D22
84
D21
83 D20
82
81
80
79
78
D19
77 D18
76 D17
75 D16
74
73
72 A17
71 A16
70 A15
69 A14
68
67
66 A13
65 A12
Rev. 3.0, 04/02, page 11 of 1064
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