Pins In Ddt Mode; Figure 14.24 System Configuration In On-Demand Data Transfer Mode - Hitachi SH7751 Hardware Manual

14.5.2

Pins in DDT Mode

Figure 14.24 shows the system configuration in DDT mode.
SH7751 Series
A25–A0, RAS, CAS, WE, DQMn, CKE

Figure 14.24 System Configuration in On-Demand Data Transfer Mode

  



: Data bus release request signal for transmitting the data transfer request format (DTR
format) or a DMA request from an external device to the DMAC
If there is a wait for release of the data bus, an external device can have the data bus released


by asserting
    


: Data bus D31–D0 release signal

Assertion of
 


: Transfer request signal

Assertion of has the following different meanings.

In normal data transfer mode (except channel 0),
DTR format is output, two cycles after

In the case of the handshake protocol without use of the data bus, asserting
transfer request to be issued for the channel for which a transfer request was made
immediately before. This function can be used only when
earlier.

In the case of direct data transfer mode (valid only for channel 2), a direct transfer request
can be made to channel 2 by asserting
Rev. 3.0, 04/02, page 522 of 1064
/DRAK0
/
/DACK0
ID1, ID0/DRAK1, DACK1
CLK
D31–D0 = DTR
Synchronous
DRAM


. When is accepted, the BSC asserts
means that the data bus will be released two cycles later.
/

is asserted, and at the same time the

is asserted.


 
and simultaneously.
External device

.

enables a
is not asserted two cycles