Figure 23.25 Synchronous Dram Normal Read Bus Cycle: Read Command, Burst (Cas Latency = 3) - Hitachi SH7751 Hardware Manual

Figure 23.25 Synchronous DRAM Normal Read Bus Cycle: READ Command, Burst
(CAS Latency = 3)
Rev. 3.0, 04/02, page 980 of 1064