Figure 22.8 Master Read Cycle In Host Mode (Single) - Hitachi SH7751 Hardware Manual

PCICLK
AD31–AD0
PAR
C/ –C/
IDSEL
/
–
/
–

Figure 22.8 Master Read Cycle in Host Mode (Single)

Rev. 3.0, 04/02, page 900 of 1064
,
,
Addr: PCI space address
Dn: nth data
AP: Address parity
DPn: nth data parity
Com: Command
BEn: nth data byte enable
Addr D0
AP
Com BE0
LOCKed
DPn