Break Address Register B (Barb); Break Asid Register B (Basrb); Break Address Mask Register B (Bamrb); Break Data Register B (Bdrb) - Hitachi SH7751 Hardware Manual

Superh risc engine
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20.2.6

Break Address Register B (BARB)

BARB is the channel B break address register. The bit configuration is the same as for BARA.
20.2.7

Break ASID Register B (BASRB)

BASRB is the channel B break ASID register. The bit configuration is the same as for BASRA.
20.2.8

Break Address Mask Register B (BAMRB)

BAMRB is the channel B break address mask register. The bit configuration is the same as for
BAMRA.
20.2.9

Break Data Register B (BDRB)

Bit:
31
BDB31
Initial value:
*
R/W:
R/W
Bit:
23
BDB23
Initial value:
*
R/W:
R/W
Bit:
15
BDB15
Initial value:
*
R/W:
R/W
Bit:
7
BDB7
Initial value:
*
R/W:
R/W
Note: *: Undefined
Break data register B (BDRB) is a 32-bit readable/writable register that specifies the data (bits 31–
0) to be used in the channel B break conditions. BDRB is not initialized by a power-on reset or
manual reset.
30
29
BDB30
BDB29
*
*
R/W
R/W
22
21
BDB22
BDB21
*
*
R/W
R/W
14
13
BDB14
BDB13
*
*
R/W
R/W
6
5
BDB6
BDB5
*
*
R/W
R/W
28
27
BDB28
BDB27
BDB26
*
*
R/W
R/W
20
19
BDB20
BDB19
BDB18
*
*
R/W
R/W
12
11
BDB12
BDB11
BDB10
*
*
R/W
R/W
4
3
BDB4
BDB3
*
*
R/W
R/W
Rev. 3.0, 04/02, page 759 of 1064
26
25
BDB25
BDB24
*
*
R/W
R/W
18
17
BDB17
BDB16
*
*
R/W
R/W
10
9
BDB9
*
*
R/W
R/W
2
1
BDB2
BDB1
BDB0
*
*
R/W
R/W
24
*
R/W
16
*
R/W
8
BDB8
*
R/W
0
*
R/W

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