Usage Notes; Status Pin Change Timing; In Reset; Figure 9.1 Status Output In Power-On Reset - Hitachi SH7751 Hardware Manual

Superh risc engine
Table of Contents

Advertisement

9.8.3

Usage Notes

The CA pin level must be kept high during the power-on oscillation settling period when the RTC
power supply is started (figure 9.15).
9.9

STATUS Pin Change Timing

The STATUS1 and STATUS0 pin change timing is shown below.
The meaning of the STATUS pin settings is as follows:
Reset:
HH (STATUS1 high, STATUS0 high)
Sleep:
HL (STATUS1 high, STATUS0 low)
Standby: LH (STATUS1 low, STATUS0 high)
Normal:
LL (STATUS1 low, STATUS0 low)
The meaning of the clock units is as follows:
Bcyc: Bus clock cycle
Pcyc: Peripheral clock cycle
9.9.1

In Reset

Power-On Reset
CKIO
Normal
STATUS
Rev. 3.0, 04/02, page 230 of 1064
PLL stabilization
time
0–5 Bcyc

Figure 9.1 STATUS Output in Power-On Reset

Reset
0–30 Bcyc
Normal

Advertisement

Table of Contents
loading

This manual is also suitable for:

Sh7751r

Table of Contents