Panasonic DVC PRO Studio AJ-D950P Service Manual page 401

Vtr/analog video interface kit
Table of Contents

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AV OVERALL BLOCK DIAGRAM
F3 V IN
YC SEP
COMPOSITE IN
&
C DEC
COMPONENT IN
F8 AUD ADDA
CH1-CH4
ANALOG
LEV
AUDIO IN
SEL
CH1-CH4
ANALOG
OUT
AUDIO OUT
AMP
AES/EBU IN
AES/EBU OUT
F4 SDI
SERIAL IN
S/P
SERIAL OUT
P/S
F6 SUB VOUT SUB
Y
COMPONENT OUT
S
PB
E
PR
L
COMPOSITE OUT
H1 CUE
LEV
CUE IN
SEL
CUE OUT
Y
REC Y DATA
PB
REC C DATA
PR
INPUT
SEL
AD
TBC
Y
PB
PR
ADSD12
ADSD34
REC
AD
LEV
DASD12
DASD34
DA
DIN DATA12
DIN DATA34
D OUT12
D OUT34
REC Y DATA
REC C DATA
REC AUD12
REC AUD34
SIF
YC
DEC
MIX
REC M DATA
M
S
M
S
REC S DATA
SEL
ENC AUD12
ENC AUD34
SDI MOUT
SIF
SDI SOUT
ENC
844DA
MAIN IN
SUB IN
IP
R
YC SEP
CONV
G
B
D
422DA
A
YC
DIGITAL
YC SEP
FILTER
CUE MIX DATA
CUE
CUE REC
REC
CUE
CUE PB
PB
F5 REC/PB
MAIN IN
SUB IN
PP
CAS R
REC
REC DATA12
REC DATA34
SYSTEM IF
MAIN OUT
SUB OUT
PP PB
CAS P
PB DATA12
PB DATA34
F7 A PROC
SIN12
SIN34
SIF
12/34
APRO CNT1
SOUT12
APRO CNT2
SOUT34
SEL
•INPUT
DIN12
SEL
DIN34
•INT SG
DIF
•A MIX
12/34
•CUE MIX
DOUT12
•LV METER
ADSD12
DOUT34
ADSD34
DASD12
DASD34
SDI MOUT
SDI SOUT
SYS H
V PHASE
D OUT SDI
SYS H
V PHASE
DOWN
CONV
SYS H
COMPOSITE
SYNC GEN.
ENCODER
F6 VOUT
H2 XCAN
L REC DATA
R REC DATA
EE DATA L
FT2 R
FT1 R
EE DATA R
SHTL
EDA
FT1 P
FT2 P
EDA DATA RP L
EDA DATA RP R
L PB DATA
R PB DATA
EDA DATA PB L
EDA DATA PB R
PB MDATA
PHASE CNT
PB SDATA
•12/34
PHASE CNT
•DATA SEL
JOG CNT
INTERPOLATION
V PROC.
FIFO
FIFO
MUX
VLP
V PROC.
PROCESS CONTROL
HEAD BUFFER
RP HEAD
REC AMP
HEAD AMP
REC DATA L
REC DATA R
CROSS
TALK
CANCEL
H3 RFEQ L
PB DATA
H4 RFEQ R
PB CLK
PB EYE
RP EQ(50M)
PB HEAD
PB EQ(50M)
RP EQ(25M)
PB EQ(25M)
YC SEP
YM CM YS
TXT MIX
TBC
&
FIFO
TBC
CONTROL

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