ABB Relion 670 Series Applications Manual page 84

Section 4
Analog inputs
13.8 kV
120 V
IEC06000600 V5 EN-US
Figure 22: A Two phase-to-phase connected VT
Where:
1)
2)
3)
4)
5)
78
L1
L2
L3
13.8 kV
120 V
shows how to connect the secondary side of a phase-to-phase VT to the VT inputs on the IED
is the TRM where these three voltage inputs are located. It shall be noted that for these three
voltage inputs the following setting values shall be entered:
VTprim =13.8 kV
VTsec =120 V
Please note that inside the IED only ratio of these two parameters is used.
are three connections made in the Signal Matrix tool (SMT), Application configuration tool (ACT),
which connects these three voltage inputs to first three input channels of the preprocessing
function block 5). Depending on the type of functions, which need this voltage information, more
than one preprocessing block might be connected in parallel to these three VT inputs
shows that in this example the fourth (that is, residual) input channel of the preprocessing block is
not connected in SMT. Note. If the parameters U
be connected here.
Preprocessing block has a task to digitally filter the connected analog inputs and calculate:
• fundamental frequency phasors for all four input channels
• harmonic content for all four input channels
• positive, negative and zero sequence quantities by using the fundamental frequency phasors
for the first three input channels (channel one taken as reference for sequence quantities)
These calculated values are then available for all built-in protection and control functions within the
IED, which are connected to this preprocessing function block in the configuration tool. For this
application most of the preprocessing settings can be left to the default values. However the
following settings shall be set as shown here:
ConnectionType = Ph-Ph
UBase=13.8 kV
If frequency tracking and compensation is required (this feature is typically required only for IEDs
installed in the generating stations) then the setting parameters
accordingly.
© Copyright 2017 Hitachi Power Grids. All rights reserved
IED
2
1
, U , U , U
L1 L2 L3
1MRK 511 401-UEN Rev. K
3
5
SMAI2
BLOCK
REVROT
^GRP2L1
^GRP2L2
^GRP2L3
#Not Used ^GRP2N
4
IEC06000600-5-en.vsdx
should be used the open delta must
N
DFTReference shall be set
Bay control REC670
Application manual
AI3P
AI1
AI2
AI3
AI4
AIN
.