Motorola CPU32 Reference Manual page 165

III
MULS
Operation:
Assembler
Syntax:
Attributes:
Signed Multiply
Source
*
Destination
~
Destination
MULS.W (ea), On
MULS.L (ea), 01
MULS.L (ea), Dh:DI
Size
=
(Word, Long)
16x16~32
32x32 ~ 32
32x32 ~ 64
MULS
Description: Multiplies two signed operands yielding a signed result.
In the word form, the multiplier and multiplicand are both word operands, and the result is a long
word operand. A register operand is the low-order word; the upper word of the register is ignored.
All 32 bits of the product are saved in the destination data register.
In the long form, the multiplier and multiplicand are both long word operands, and the result is
either a long word or a quad word. The long word result is the low-order 32 bits of the quad word
result; the high-order 32 bits of the product are discarded.
Condition Codes:
x
N
z
v c
o
X
Not affected.
N Set if the result is negative. Cleared otherwise.
Z Set if the result is zero. Cleared otherwise.
V
Set if overflow. Cleared otherwise.
C Always cleared.
NOTE
Overflow
(V
=
1) can occur only when multiplying 32-bit operands to yield a 32-bit
result. Overflow occurs if the high-order 32 bits of the quad word product are not
the sign extension of the low-order 32 bits.
MOTOROLA
4-112
INSTRUCTION SET CPU32 REFERENCE MANUAL