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The encoding for SCALE used by the CPU32 and the MC68020 is a compatible
extension of the M68000 architecture. A value of zero for SCALE is the same
encoding for both extension words; thus, software that uses this encoding is
both upward and downward compatible across all processors in the product
line.
However, the other values of SCALE are not found in both extension
formats; therefore, while software can be easily migrated in an upward
compatible direction, only nonscaled addressing is supported in a downward
fashion.
If
the MC68000 were to execute an instruction that encoded a scaling
factor, the scaling factor would be ignored and would not access the desired
memory address.
3.7 Other Data Structures
In addition to supporting the array data structure with the index addressing
mode, M68000 processors also support stack and queue data structures with
the address register indirect postincrement and predecrement addressing
modes. A stack is a last-in-first-out (LIFO) list; a queue is a first-in-first-out (FIFO)
list. When data is added to a stack or queue, it is pushed onto the structure;
when it is removed, it is " popped," or pulled, from the structure. The system
stack is used implicitly by many instructions; user stacks and queues may be
created and maintained through use of addressing modes.
3.7.1 System Stack
Address register 7 (A7) is the system stack pOinter (SP). The SP is either the
supervisor stack pOinter (SSP) or the user stack pointer (USP), depending on
the state of the S bit in the status register. If the S bit indicates the supervisor
state, the SSP is the SP, and the USP cannot be referenced as an address
register. If the S bit indicates the user state, the USP is the active SP, and the
SSP cannot be referenced. Each system stack fills from high memory to low
memory. The address mode -(SP) creates a new item on the active system
stack, and the address mode (SP)+ deletes an item from the active system
stack.
The program counter is saved on the active system stack on subroutine calls
and is restored from the active system stack on returns. On the other hand, both
the program counter and the status register are saved on the supervisor stack
during the processing of traps and interrupts. Thus, the correct execution of the
supervisor state code is not dependent on the behavior of user code, and user
programs may use the USP arbitrarily.
CPU32 REFERENCE MANUAL
DATA ORGANIZATION AND
ADDRESSING
CAPABILITIES
MOTOROLA
3-19
lEI
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