Motorola CPU32 Reference Manual page 311

Table 7-4. 80M Command Summary
Command
Read AID Register
Write AID Register
Read System Register
Write System Register
Read Memory Location
Write Memory Location
Dump Memory Block
Fill Memory Block
Resume Execution
Call User Code
Reset Peripherals
No Operation
MOTOROLA
7-18
Mnemonic
Description
RAREGIRDREG
Read the selected address or data register and return
the results via the serial interface.
WAREGlWDREG
The data operand is written to the specified address
or data register.
The·specified system control register is read. All
RSREG registers that can be read in supervisor mode can be
read in BDM.
WSREG
The operand data is written into the specified system
control register.
Read the sized data at the memory location specified
READ
by the long-word address. The source function code
register (SFC) determines the address space
accessed.
Write the operand data to the memory location
WRITE
specified by the long-word address. The destination
function code register (DFC) register determines the
address space accessed.
Used in conjunction with the READ command to dump
large blocks of memory. An initial READ is executed
DUMP to set up the starting address of the block and to
retrieve the first result. Subsequent operands are
retrieved with the DUMP command.
Used in conjunction with the WRITE command to fill
large blocks of memory. An initial WRITE is executed
FILL
to set up the starting address
of
the block and to
supply the first operand. Subsequent operands are
written with the FILL command.
GO
The pipeline is flushed and refilled before resuming
instruction execution at the return PC.
CALL
Current PC is stacked at the location of the current
SP. Instruction execution begins at user patch code.
Asserts RESET for 512 clock cycles. The CPU is not
RST reset by this command. Synonymous with the CPU
RESET instruction.
NOP
NOP performs no operation and may be used as a null
command.
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