Address Register Indirect; Address Register Indirect With Postincrement; Address Register Indirect With Predecrement - Motorola CPU32 Reference Manual

3.4.2.1 Address Register Indirect
In the address register indirect mode, the operand is in memory, and the
address of the operand is in the address register specified by the register field.
GENERATION:
ASSEMBLER SYNTAX:
MODE:
REGISTER:
ADDRESS REGISTER:
EA = (An)
(An)
010
n
An----~
31
o
MEMORY ADDRESS
~----------~----------~
MEMORY ADDRESS:
NUMBER OF EXTENSION WORDS:
31
o
OPERAND
3.4.2.2 Address Register Indirect With Postincrement
In the address register indirect with postincrement mode, the operand is in
memory, and the address of the operand is in the address register specified by
the register field. After the operand address is used, it is incremented by one,
two, or four, depending on the size of the operand: byte, word, or long word. If
the address register is the stack pointer and the operand size is byte, the
address is incremented by two rather than one to keep the stack pointer aligned
to a word boundary.
GENERATION:
ASSEMBLER SYNTAX:
MODE:
REGISTER:
ADDRESS REGISTER:
EA
=
(An)
An =An + SIZE
(An)
+
011
n
31
An
-------,~~I
MEMORY ADDRESS
~-------.r-----~------~
OPERAND LENGTH ( 1, 2, OR 4):
--------~
+
~-----I
31
MEMORY ADDRESS:
NUMBER OF EXTENSION WORDS:
OPERAND
3.4.2.3 Address Register Indirect With Predecrement
In the address register indirect with predecrement mode, the operand is in
memory, and the address of the operand is in the address register specified by
the register field. Before the operand address is used, it is decremented by one,
two, or four, depending on the operand size: byte, word, or long word. If the
address register is the stack pointer and the operand size is byte, the address is
decremented by two rather than one to keep the stack pointer aligned to a word
boundary.
CPU32 REFERENCE MANUAL DATA ORGANIZATION AND
ADDRESSING CAPABILITIES
MOTOROLA
3-5