Motorola CPU32 Reference Manual page 82

M68300 series central processor unit
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ADDX
Operation:
Assembler
Syntax:
Attributes:
Add Extended
Source
+
Destination
+
X
~
Destination
ADDX Dy, Dx
ADDX- (Ay), - (Ax)
Size
=
(Byte, Word, Long)
ADDX
Description:
Adds the source operand to the destination operand along with the extend bit and
stores the result in the destination location. The operands can be addressed in two ways:
1. Data register to data register: Data registers specified by the instruction contain the
operands.
2. Memory to memory: Address registers specified by the instruction address the operands
using the predecrement addressing mode.
Condition Codes:
x
N
Z
v
c
X Set the same as the carry bit.
N Set if the result is negative. Cleared otherwise.
Z Cleared if the result is nonzero. Unchanged otherwise.
V Set if an overflow occurs. Cleared otherwise.
C Set if a carry is generated. Cleared otherwise.
NOTE
Normally the Z condition code bit is set via programming before the start of an
operation. This allows successful tests for zero results upon completion of
multiple-precision operations.
Instruction Format:
15
14
13
12
o
CPU32 REFERENCE MANUAL
11
10
9
8
7
6
REGISTER
Rx
SIZE
INSTRUCTION SET
5
4
3
o
o
I
RIM
I
2
1
0
REGISTER Ry
MOTOROLA
4-29
III

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