Motorola CPU32 Reference Manual page 170

M68300 series central processor unit
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MULU
Unsigned Multiply
MULU
Instruction Format (long form):
15
14
13
12
11
10
9
8
7
6
5
4
3
2
o
EFFECTIVE ADDRESS
0
1
0
0
1
1
0
0
0
0
MODE
REGISTER
0
REGISTER 01
0
SIZE
0
0
0
0
0
J
o
I
0
REGISTER Dh
Instruction Fields:
Effective Address field -
Specifies the source operand. Only data addressing modes are
allowed as shown:
Addressing Mode
Mode
Register
Addressing Mode Mode
Register
On
000
Reg. number: On
(xxx).W
111
000
An
-
-
(xxx).L
111
001
(An)
010
Reg. number: An
#(data)
111
100
(An) +
011
Reg. number: An
-(An)
100
Reg. number: An
(d16,An)
101
Reg. number: An
(d16, PC)
111
010
(dS, An, Xn)
110
Reg. number: An
(ds, PC, Xn)
111
011
(bd, An, Xn)
110
Reg. number: An
(bd, PC, Xn)
111
011
Register 01 field -
Specifies a data register for the destination operand. The 32-bit multiplicand
comes from this register, and the low-order 32 bits of the product are loaded into this register.
Size field - Selects a 32- or 64-bit product.
0-
32-bit product to be returned to Register 01.
1 -
64-bit product to be returned to Oh:OI.
Register Oh field - If Size is 1, specifies the data register into which the high-order 32 bits of the
product are loaded. If Oh
=
01 and Size is 1, the results of the operation are undefined.
CPU32 REFERENCE MANUAL
INSTRUCTION SET
MOTOROLA
4-117
III

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