TRAPV
Operation:
Assembler
Syntax:
Attributes:
If V then TRAP
TRAPV
Unsized
Trap on Overflow
TRAPV
Description:
If the CCR overflow bit is set, there is a TRAPV exception (vector number 7). If the bit is
not set, the processor performs no operation and execution continues with the next instruction.
Condition Codes:
Not affected.
Instruction Format:
15
14
13
12
11
0
I
1
0
0
I
1
I
CPU32 REFERENCE MANUAL
10
9
8
7
1
1
0
I
0
I
INSTRUCTION SET
6
5
4
1
1
3
2
o
MOTOROLA
4-171
III